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Add IR_PVAL instruction for non-slot parent links.

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Mike Pall 2012-07-02 22:47:20 +02:00
parent 5d0115ef8d
commit 0688de5483
3 changed files with 4 additions and 1 deletions
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2
src/lj_asm.c
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@ -1287,7 +1287,7 @@ static void asm_head_side(ASMState *as)
IRIns *ir = IR(i); IRIns *ir = IR(i);
RegSP rs; RegSP rs;
lua_assert((ir->o == IR_SLOAD && (ir->op2 & IRSLOAD_PARENT)) || lua_assert((ir->o == IR_SLOAD && (ir->op2 & IRSLOAD_PARENT)) ||
(LJ_SOFTFP && ir->o == IR_HIOP)); (LJ_SOFTFP && ir->o == IR_HIOP) || ir->o == IR_PVAL);
rs = as->parentmap[i - REF_FIRST]; rs = as->parentmap[i - REF_FIRST];
if (ra_hasreg(ir->r)) { if (ra_hasreg(ir->r)) {
rset_clear(allow, ir->r); rset_clear(allow, ir->r);

1
src/lj_ir.h
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@ -33,6 +33,7 @@
/* Miscellaneous ops. */ \ /* Miscellaneous ops. */ \
_(NOP, N , ___, ___) \ _(NOP, N , ___, ___) \
_(BASE, N , lit, lit) \ _(BASE, N , lit, lit) \
_(PVAL, N , lit, ___) \
_(GCSTEP, S , ___, ___) \ _(GCSTEP, S , ___, ___) \
_(HIOP, S , ref, ref) \ _(HIOP, S , ref, ref) \
_(LOOP, S , ___, ___) \ _(LOOP, S , ___, ___) \

2
src/lj_snap.c
View File

@ -339,6 +339,8 @@ IRIns *lj_snap_regspmap(GCtrace *T, SnapNo snapno, IRIns *ir)
} }
} else if (LJ_SOFTFP && ir->o == IR_HIOP) { } else if (LJ_SOFTFP && ir->o == IR_HIOP) {
ref++; ref++;
} else if (ir->o == IR_PVAL) {
ref = ir->op1 + REF_BIAS;
} else { } else {
break; break;
} }