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LoongArch64: Add register assignments for the interpreter
Co-developed-by: Qiqi Huang <huangqiqi@loongson.cn>
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74
src/vm_loongarch64.dasc
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74
src/vm_loongarch64.dasc
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|// Low-level VM code for LoongArch CPUs.
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|// Bytecode interpreter, fast functions and helper functions.
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|// Copyright (C) 2005-2022 Mike Pall. See Copyright Notice in luajit.h
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|.arch loongarch64
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|//-----------------------------------------------------------------------
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|// Fixed register assignments for the interpreter.
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|// Don't use: r0 = 0, r1 = ra, r2 = tp, r3 = sp, r21 = reserved
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|// The following must be C callee-save (but BASE is often refetched).
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|.define BASE, r23 // Base of current Lua stack frame.
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|.define KBASE, r24 // Constants of current Lua function.
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|.define PC, r25 // Next PC.
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|.define DISPATCH, r26 // Opcode dispatch table.
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|.define LREG, r27 // Register holding lua_State (also in SAVE_L).
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|.define MULTRES, r28 // Size of multi-result: (nresults+1)*8.
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|.define JGL, r22 // On-trace: global_State + 32768.
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|// Constants for type-comparisons, stores and conversions. C callee-save.
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|.define TISNIL, r22
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|.define TISNUM, r29
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|.define TOBIT, f30 // 2^52 + 2^51.
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|// The following temporaries are not saved across C calls, except for RA.
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|.define RA, r30 // Callee-save.
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|.define RB, r8
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|.define RC, r9
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|.define RD, r10
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|.define INS, r11
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|.define TMP0, r12
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|.define TMP1, r13
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|.define TMP2, r14
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|.define TMP3, r15
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|.define TMP4, r17
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|// Loongarch lp64 calling convention.
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|.define CARG1, r4
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|.define CARG2, r5
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|.define CARG3, r6
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|.define CARG4, r7
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|.define CARG5, r8
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|.define CARG6, r9
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|.define CARG7, r10
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|.define CARG8, r11
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|.define CRET1, r4
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|.define CRET2, r5
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|.define FARG1, f0
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|.define FARG2, f1
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|.define FARG3, f2
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|.define FARG4, f3
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|.define FARG5, f4
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|.define FARG6, f5
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|.define FARG7, f6
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|.define FARG8, f7
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|.define FRET1, f0
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|.define FRET2, f1
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|.define FTMP0, f8
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|.define FTMP1, f9
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|.define FTMP2, f10
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|.define FTMP3, f22
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|.define FTMP4, f23
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|.define FCC0, fcc0
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|.define FCC1, fcc1
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