From 030a8643e74a1526a6d1637d75bd3175e873605a Mon Sep 17 00:00:00 2001 From: Gustavo Serra Scalet Date: Fri, 19 Feb 2016 15:09:18 -0200 Subject: [PATCH] PPC64: Fix external branches that should address on R12 The TOC register was not set correctly when branching with other registers as the PIC code setup uses the R12 reference in order to set the R2 (TOC register). This is only acknowledged by using LuaJIT as a library, as torch uses on it qtlua/qlua subproject. --- src/vm_ppc64.dasc | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/vm_ppc64.dasc b/src/vm_ppc64.dasc index 45e5af91..b68cf362 100644 --- a/src/vm_ppc64.dasc +++ b/src/vm_ppc64.dasc @@ -59,7 +59,7 @@ |.define RA, r20 // Callee-save. |.define RB, r10 |.define RC, r11 -|.define RD, r12 +|.define RD, r12 // Also used as function linkage register |.define INS, r7 // Overlaps CARG5. | |.define TMP0, r0 @@ -696,7 +696,8 @@ static void build_subroutines(BuildCtx *ctx) | std TMP1, SAVE_CFRAME | std sp, L->cframe // Add our C frame to cframe chain. | std L, DISPATCH_GL(cur_L)(DISPATCH) - | mtctr CARG4 + | mr r12, CARG4 // keep r12 for function linkage. + | mtctr r12 | bctrl // (lua_State *L, lua_CFunction func, void *ud) | mr. BASE, CRET1 | li PC, FRAME_CP @@ -2059,7 +2060,8 @@ static void build_subroutines(BuildCtx *ctx) | std TMP1, L->top | mr CARG1, L | bgt >5 // Need to grow stack. - | mtctr TMP3 + | mr r12, TMP3 // keep r12 for function linkage. + | mtctr r12 | bctrl // (lua_State *L) | // Either throws an error, or recovers and returns -1, 0 or nresults+1. | ld BASE, L->base @@ -4326,7 +4328,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop) | cmpld TMP1, TMP2 | std RC, L->top | li_vmstate C - | mtctr RD + | mtctr RD // RD is r12, the function linkage register if (op == BC_FUNCCW) { | ld CARG2, CFUNC:RB->f }