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DynASM/x64: Full VREG support.
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@ -170,7 +170,7 @@ void dasm_put(Dst_DECL, int start, ...)
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dasm_State *D = Dst_REF;
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dasm_State *D = Dst_REF;
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dasm_ActList p = D->actionlist + start;
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dasm_ActList p = D->actionlist + start;
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dasm_Section *sec = D->section;
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dasm_Section *sec = D->section;
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int pos = sec->pos, ofs = sec->ofs, mrm = 4;
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int pos = sec->pos, ofs = sec->ofs, mrm = -1;
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int *b;
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int *b;
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if (pos >= sec->epos) {
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if (pos >= sec->epos) {
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@ -193,7 +193,7 @@ void dasm_put(Dst_DECL, int start, ...)
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b[pos++] = n;
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b[pos++] = n;
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switch (action) {
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switch (action) {
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case DASM_DISP:
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case DASM_DISP:
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if (n == 0) { if ((mrm&7) == 4) mrm = p[-2]; if ((mrm&7) != 5) break; }
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if (n == 0) { if (mrm < 0) mrm = p[-2]; if ((mrm&7) != 5) break; }
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case DASM_IMM_DB: if (((n+128)&-256) == 0) goto ob;
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case DASM_IMM_DB: if (((n+128)&-256) == 0) goto ob;
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case DASM_REL_A: /* Assumes ptrdiff_t is int. !x64 */
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case DASM_REL_A: /* Assumes ptrdiff_t is int. !x64 */
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case DASM_IMM_D: ofs += 4; break;
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case DASM_IMM_D: ofs += 4; break;
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@ -203,10 +203,17 @@ void dasm_put(Dst_DECL, int start, ...)
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case DASM_IMM_W: CK((n&-65536) == 0, RANGE_I); ofs += 2; break;
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case DASM_IMM_W: CK((n&-65536) == 0, RANGE_I); ofs += 2; break;
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case DASM_SPACE: p++; ofs += n; break;
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case DASM_SPACE: p++; ofs += n; break;
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case DASM_SETLABEL: b[pos-2] = -0x40000000; break; /* Neg. label ofs. */
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case DASM_SETLABEL: b[pos-2] = -0x40000000; break; /* Neg. label ofs. */
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case DASM_VREG: CK((n&-8) == 0 && (n != 4 || (*p&1) == 0), RANGE_VREG);
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case DASM_VREG: CK((n&-16) == 0 && (n != 4 || (*p>>5) != 2), RANGE_VREG);
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if (*p++ == 1 && *p == DASM_DISP) mrm = n; continue;
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if (*p < 0x40 && p[1] == DASM_DISP) mrm = n;
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if (*p < 0x20 && (n&7) == 4) ++ofs;
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switch ((*p++>>3)&3) {
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case 3: n |= b[pos-3];
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case 2: n |= b[pos-2];
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case 1: if(n <= 7) b[pos-1] |= 0x10, --ofs;
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}
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continue;
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}
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}
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mrm = 4;
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mrm = -1;
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} else {
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} else {
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int *pl, n;
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int *pl, n;
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switch (action) {
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switch (action) {
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@ -393,7 +400,19 @@ int dasm_encode(Dst_DECL, void *buffer)
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case DASM_IMM_W: dasmw(n); break;
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case DASM_IMM_W: dasmw(n); break;
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case DASM_VREG: {
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case DASM_VREG: {
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int t = *p++;
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int t = *p++;
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if (t >= 5) n <<= 4; else if (t >= 2) n <<= 3;
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unsigned char* ex = cp - (t&7);
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if ((n & 8) && (t < 0xa0)) {
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if (*ex & 0x80) ex[1] ^= 0x20<<(t>>6); else *ex ^= 1<<(t>>6);
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n &= 7;
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} else if (n & 0x10) {
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if (*ex & 0x80) *ex = 0xc5, ex[1] = (ex[1] & 0x80) | ex[2], ex += 2;
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while (++ex < cp) ex[-1] = *ex;
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if (mark) --mark;
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--cp; n &= 7;
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}
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if (t >= 0xc0) n <<= 4;
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else if (t >= 0x40) n <<= 3;
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else if (n == 4 && t < 0x20) cp[-1] ^= n, *cp++ = 0x20;
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cp[-1] ^= n;
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cp[-1] ^= n;
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break;
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break;
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}
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}
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@ -41,7 +41,7 @@ local action_names = {
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-- int arg, 1 buffer pos:
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-- int arg, 1 buffer pos:
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"DISP", "IMM_S", "IMM_B", "IMM_W", "IMM_D", "IMM_WB", "IMM_DB",
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"DISP", "IMM_S", "IMM_B", "IMM_W", "IMM_D", "IMM_WB", "IMM_DB",
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-- action arg (1 byte), int arg, 1 buffer pos (reg/num):
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-- action arg (1 byte), int arg, 1 buffer pos (reg/num):
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"VREG", "SPACE", -- !x64: VREG support NYI.
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"VREG", "SPACE",
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-- ptrdiff_t arg, 1 buffer pos (address): !x64
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-- ptrdiff_t arg, 1 buffer pos (address): !x64
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"SETLABEL", "REL_A",
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"SETLABEL", "REL_A",
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-- action arg (1 byte) or int arg, 2 buffer pos (link, offset):
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-- action arg (1 byte) or int arg, 2 buffer pos (link, offset):
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@ -83,6 +83,21 @@ local actargs = { 0 }
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-- Current number of section buffer positions for dasm_put().
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-- Current number of section buffer positions for dasm_put().
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local secpos = 1
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local secpos = 1
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-- VREG kind encodings (pre-shifted by 5 bits)
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local map_vreg = {
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["modrm.rm.m"] = 0x00,
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["modrm.rm.r"] = 0x20,
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["opcode"] = 0x20,
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["sib.base"] = 0x20,
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["sib.index"] = 0x40,
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["modrm.reg"] = 0x80,
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["vex.v"] = 0xa0,
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["imm.hi"] = 0xc0,
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}
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-- Current number of VREG actions contributing to REX/VEX shrinkage.
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local vreg_shrink_count = 0
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------------------------------------------------------------------------------
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------------------------------------------------------------------------------
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-- Compute action numbers for action names.
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-- Compute action numbers for action names.
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@ -134,6 +149,21 @@ local function waction(action, a, num)
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if a or num then secpos = secpos + (num or 1) end
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if a or num then secpos = secpos + (num or 1) end
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end
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end
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-- Optionally add a VREG action.
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local function wvreg(kind, vreg, psz, sk, defer)
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if not vreg then return end
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waction("VREG", vreg)
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local b = assert(map_vreg[kind], "bad vreg kind `"..vreg.."'")
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if b < (sk or 0) then
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vreg_shrink_count = vreg_shrink_count + 1
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end
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if not defer then
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b = b + vreg_shrink_count * 8
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vreg_shrink_count = 0
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end
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wputxb(b + (psz or 0))
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end
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-- Add call to embedded DynASM C code.
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-- Add call to embedded DynASM C code.
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local function wcall(func, args)
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local function wcall(func, args)
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wline(format("dasm_%s(Dst, %s);", func, concat(args, ", ")), true)
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wline(format("dasm_%s(Dst, %s);", func, concat(args, ", ")), true)
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@ -326,6 +356,7 @@ mkrmap("w", "Rw", {"ax", "cx", "dx", "bx", "sp", "bp", "si", "di"})
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mkrmap("b", "Rb", {"al", "cl", "dl", "bl", "ah", "ch", "dh", "bh"})
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mkrmap("b", "Rb", {"al", "cl", "dl", "bl", "ah", "ch", "dh", "bh"})
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map_reg_valid_index[map_archdef.esp] = false
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map_reg_valid_index[map_archdef.esp] = false
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if x64 then map_reg_valid_index[map_archdef.rsp] = false end
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if x64 then map_reg_valid_index[map_archdef.rsp] = false end
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if x64 then map_reg_needrex[map_archdef.Rb] = true end
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map_archdef["Ra"] = "@"..addrsize
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map_archdef["Ra"] = "@"..addrsize
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-- FP registers (internally tword sized, but use "f" as operand size).
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-- FP registers (internally tword sized, but use "f" as operand size).
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@ -463,16 +494,24 @@ local function wputszarg(sz, n)
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end
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end
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-- Put multi-byte opcode with operand-size dependent modifications.
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-- Put multi-byte opcode with operand-size dependent modifications.
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local function wputop(sz, op, rex, vex)
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local function wputop(sz, op, rex, vex, vregr, vregxb)
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local psz, sk = 0
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if vex then
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if vex then
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local tail
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local tail
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if vex.m == 1 and band(rex, 11) == 0 then
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if vex.m == 1 and band(rex, 11) == 0 then
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wputb(0xc5)
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if x64 and vregxb then
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tail = shl(bxor(band(rex, 4), 4), 5)
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sk = map_vreg["modrm.reg"]
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else
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else
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wputb(0xc5)
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tail = shl(bxor(band(rex, 4), 4), 5)
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psz = 3
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end
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end
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if not tail then
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wputb(0xc4)
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wputb(0xc4)
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wputb(shl(bxor(band(rex, 7), 7), 5) + vex.m)
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wputb(shl(bxor(band(rex, 7), 7), 5) + vex.m)
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tail = shl(band(rex, 8), 4)
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tail = shl(band(rex, 8), 4)
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psz = 4
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end
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end
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local reg, vreg = 0, nil
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local reg, vreg = 0, nil
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if vex.v then
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if vex.v then
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@ -482,12 +521,18 @@ local function wputop(sz, op, rex, vex)
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end
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end
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if sz == "y" or vex.l then tail = tail + 4 end
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if sz == "y" or vex.l then tail = tail + 4 end
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wputb(tail + shl(bxor(reg, 15), 3) + vex.p)
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wputb(tail + shl(bxor(reg, 15), 3) + vex.p)
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if vreg then waction("VREG", vreg); wputxb(4) end
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wvreg("vex.v", vreg)
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rex = 0
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rex = 0
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if op >= 256 then werror("bad vex opcode") end
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if op >= 256 then werror("bad vex opcode") end
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else
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if rex ~= 0 then
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if not x64 then werror("bad operand size") end
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elseif (vregr or vregxb) and x64 then
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rex = 0x10
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sk = map_vreg["vex.v"]
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end
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end
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end
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local r
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local r
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if rex ~= 0 and not x64 then werror("bad operand size") end
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if sz == "w" then wputb(102) end
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if sz == "w" then wputb(102) end
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-- Needs >32 bit numbers, but only for crc32 eax, word [ebx]
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-- Needs >32 bit numbers, but only for crc32 eax, word [ebx]
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if op >= 4294967296 then r = op%4294967296 wputb((op-r)/4294967296) op = r end
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if op >= 4294967296 then r = op%4294967296 wputb((op-r)/4294967296) op = r end
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@ -496,20 +541,20 @@ local function wputop(sz, op, rex, vex)
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if rex ~= 0 then
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if rex ~= 0 then
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local opc3 = band(op, 0xffff00)
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local opc3 = band(op, 0xffff00)
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if opc3 == 0x0f3a00 or opc3 == 0x0f3800 then
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if opc3 == 0x0f3a00 or opc3 == 0x0f3800 then
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wputb(64 + band(rex, 15)); rex = 0
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wputb(64 + band(rex, 15)); rex = 0; psz = 2
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end
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end
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end
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end
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wputb(shr(op, 16)); op = band(op, 0xffff)
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wputb(shr(op, 16)); op = band(op, 0xffff); psz = psz + 1
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end
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end
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if op >= 256 then
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if op >= 256 then
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local b = shr(op, 8)
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local b = shr(op, 8)
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if b == 15 and rex ~= 0 then wputb(64 + band(rex, 15)); rex = 0 end
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if b == 15 and rex ~= 0 then wputb(64 + band(rex, 15)); rex = 0; psz = 2 end
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wputb(b)
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wputb(b); op = band(op, 255); psz = psz + 1
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op = band(op, 255)
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end
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end
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if rex ~= 0 then wputb(64 + band(rex, 15)) end
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if rex ~= 0 then wputb(64 + band(rex, 15)); psz = 2 end
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if sz == "b" then op = op - 1 end
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if sz == "b" then op = op - 1 end
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wputb(op)
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wputb(op)
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return psz, sk
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end
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end
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-- Put ModRM or SIB formatted byte.
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-- Put ModRM or SIB formatted byte.
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@ -519,7 +564,7 @@ local function wputmodrm(m, s, rm, vs, vrm)
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end
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end
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-- Put ModRM/SIB plus optional displacement.
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-- Put ModRM/SIB plus optional displacement.
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local function wputmrmsib(t, imark, s, vsreg)
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local function wputmrmsib(t, imark, s, vsreg, psz, sk)
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local vreg, vxreg
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local vreg, vxreg
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local reg, xreg = t.reg, t.xreg
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local reg, xreg = t.reg, t.xreg
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if reg and reg < 0 then reg = 0; vreg = t.vreg end
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if reg and reg < 0 then reg = 0; vreg = t.vreg end
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@ -529,8 +574,8 @@ local function wputmrmsib(t, imark, s, vsreg)
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-- Register mode.
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-- Register mode.
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if sub(t.mode, 1, 1) == "r" then
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if sub(t.mode, 1, 1) == "r" then
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wputmodrm(3, s, reg)
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wputmodrm(3, s, reg)
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if vsreg then waction("VREG", vsreg); wputxb(2) end
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wvreg("modrm.reg", vsreg, psz+1, sk, vreg)
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if vreg then waction("VREG", vreg); wputxb(0) end
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wvreg("modrm.rm.r", vreg, psz+1, sk)
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return
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return
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end
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end
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@ -544,21 +589,22 @@ local function wputmrmsib(t, imark, s, vsreg)
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-- [xreg*xsc+disp] -> (0, s, esp) (xsc, xreg, ebp)
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-- [xreg*xsc+disp] -> (0, s, esp) (xsc, xreg, ebp)
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wputmodrm(0, s, 4)
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wputmodrm(0, s, 4)
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if imark == "I" then waction("MARK") end
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if imark == "I" then waction("MARK") end
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if vsreg then waction("VREG", vsreg); wputxb(2) end
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wvreg("modrm.reg", vsreg, psz+1, sk, vxreg)
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wputmodrm(t.xsc, xreg, 5)
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wputmodrm(t.xsc, xreg, 5)
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if vxreg then waction("VREG", vxreg); wputxb(3) end
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wvreg("sib.index", vxreg, psz+2, sk)
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else
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else
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-- Pure 32 bit displacement.
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-- Pure 32 bit displacement.
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if x64 and tdisp ~= "table" then
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if x64 and tdisp ~= "table" then
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wputmodrm(0, s, 4) -- [disp] -> (0, s, esp) (0, esp, ebp)
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wputmodrm(0, s, 4) -- [disp] -> (0, s, esp) (0, esp, ebp)
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wvreg("modrm.reg", vsreg, psz+1, sk)
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if imark == "I" then waction("MARK") end
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if imark == "I" then waction("MARK") end
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wputmodrm(0, 4, 5)
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wputmodrm(0, 4, 5)
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else
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else
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riprel = x64
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riprel = x64
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wputmodrm(0, s, 5) -- [disp|rip-label] -> (0, s, ebp)
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wputmodrm(0, s, 5) -- [disp|rip-label] -> (0, s, ebp)
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wvreg("modrm.reg", vsreg, psz+1, sk)
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if imark == "I" then waction("MARK") end
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if imark == "I" then waction("MARK") end
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end
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end
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if vsreg then waction("VREG", vsreg); wputxb(2) end
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end
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end
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if riprel then -- Emit rip-relative displacement.
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if riprel then -- Emit rip-relative displacement.
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if match("UWSiI", imark) then
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if match("UWSiI", imark) then
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@ -586,16 +632,16 @@ local function wputmrmsib(t, imark, s, vsreg)
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if xreg or band(reg, 7) == 4 then
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if xreg or band(reg, 7) == 4 then
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wputmodrm(m or 2, s, 4) -- ModRM.
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wputmodrm(m or 2, s, 4) -- ModRM.
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if m == nil or imark == "I" then waction("MARK") end
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if m == nil or imark == "I" then waction("MARK") end
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if vsreg then waction("VREG", vsreg); wputxb(2) end
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wvreg("modrm.reg", vsreg, psz+1, sk, vxreg or vreg)
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wputmodrm(t.xsc or 0, xreg or 4, reg) -- SIB.
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wputmodrm(t.xsc or 0, xreg or 4, reg) -- SIB.
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if vxreg then waction("VREG", vxreg); wputxb(3) end
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wvreg("sib.index", vxreg, psz+2, sk, vreg)
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if vreg then waction("VREG", vreg); wputxb(1) end
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wvreg("sib.base", vreg, psz+2, sk)
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else
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else
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wputmodrm(m or 2, s, reg) -- ModRM.
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wputmodrm(m or 2, s, reg) -- ModRM.
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if (imark == "I" and (m == 1 or m == 2)) or
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if (imark == "I" and (m == 1 or m == 2)) or
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(m == nil and (vsreg or vreg)) then waction("MARK") end
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(m == nil and (vsreg or vreg)) then waction("MARK") end
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if vsreg then waction("VREG", vsreg); wputxb(2) end
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wvreg("modrm.reg", vsreg, psz+1, sk, vreg)
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if vreg then waction("VREG", vreg); wputxb(1) end
|
wvreg("modrm.rm.m", vreg, psz+1, sk)
|
||||||
end
|
end
|
||||||
|
|
||||||
-- Put displacement.
|
-- Put displacement.
|
||||||
@ -1761,10 +1807,11 @@ local function dopattern(pat, args, sz, op, needrex)
|
|||||||
if t.xreg and t.xreg > 7 then rex = rex + 2 end
|
if t.xreg and t.xreg > 7 then rex = rex + 2 end
|
||||||
if s > 7 then rex = rex + 4 end
|
if s > 7 then rex = rex + 4 end
|
||||||
if needrex then rex = rex + 16 end
|
if needrex then rex = rex + 16 end
|
||||||
wputop(szov, opcode, rex, vex); opcode = nil
|
local psz, sk = wputop(szov, opcode, rex, vex, s < 0, t.vreg or t.vxreg)
|
||||||
|
opcode = nil
|
||||||
local imark = sub(pat, -1) -- Force a mark (ugly).
|
local imark = sub(pat, -1) -- Force a mark (ugly).
|
||||||
-- Put ModRM/SIB with regno/last digit as spare.
|
-- Put ModRM/SIB with regno/last digit as spare.
|
||||||
wputmrmsib(t, imark, s, addin and addin.vreg)
|
wputmrmsib(t, imark, s, addin and addin.vreg, psz, sk)
|
||||||
addin = nil
|
addin = nil
|
||||||
elseif map_vexarg[c] ~= nil then -- Encode using VEX prefix
|
elseif map_vexarg[c] ~= nil then -- Encode using VEX prefix
|
||||||
local b = band(opcode, 255); opcode = shr(opcode, 8)
|
local b = band(opcode, 255); opcode = shr(opcode, 8)
|
||||||
@ -1791,8 +1838,8 @@ local function dopattern(pat, args, sz, op, needrex)
|
|||||||
if szov == "q" and rex == 0 then rex = rex + 8 end
|
if szov == "q" and rex == 0 then rex = rex + 8 end
|
||||||
if needrex then rex = rex + 16 end
|
if needrex then rex = rex + 16 end
|
||||||
if addin and addin.reg == -1 then
|
if addin and addin.reg == -1 then
|
||||||
wputop(szov, opcode - 7, rex, vex)
|
local psz, sk = wputop(szov, opcode - 7, rex, vex, true)
|
||||||
waction("VREG", addin.vreg); wputxb(0)
|
wvreg("opcode", addin.vreg, psz, sk)
|
||||||
else
|
else
|
||||||
if addin and addin.reg > 7 then rex = rex + 1 end
|
if addin and addin.reg > 7 then rex = rex + 1 end
|
||||||
wputop(szov, opcode, rex, vex)
|
wputop(szov, opcode, rex, vex)
|
||||||
@ -1836,7 +1883,7 @@ local function dopattern(pat, args, sz, op, needrex)
|
|||||||
local reg = a.reg
|
local reg = a.reg
|
||||||
if reg < 0 then
|
if reg < 0 then
|
||||||
wputb(0)
|
wputb(0)
|
||||||
waction("VREG", a.vreg); wputxb(5)
|
wvreg("imm.hi", a.vreg)
|
||||||
else
|
else
|
||||||
wputb(shl(reg, 4))
|
wputb(shl(reg, 4))
|
||||||
end
|
end
|
||||||
@ -1988,8 +2035,8 @@ if x64 then
|
|||||||
rex = a.reg > 7 and 9 or 8
|
rex = a.reg > 7 and 9 or 8
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
wputop(sz, opcode, rex)
|
local psz, sk = wputop(sz, opcode, rex, nil, vreg)
|
||||||
if vreg then waction("VREG", vreg); wputxb(0) end
|
wvreg("opcode", vreg, psz, sk)
|
||||||
waction("IMM_D", format("(unsigned int)(%s)", op64))
|
waction("IMM_D", format("(unsigned int)(%s)", op64))
|
||||||
waction("IMM_D", format("(unsigned int)((%s)>>32)", op64))
|
waction("IMM_D", format("(unsigned int)((%s)>>32)", op64))
|
||||||
end
|
end
|
||||||
|
Loading…
Reference in New Issue
Block a user